Invention Application
- Patent Title: PHASE ERROR DE-GLITCHING CIRCUIT AND METHOD OF OPERATING
- Patent Title (中): 相位误差去除电路和操作方法
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Application No.: US11671423Application Date: 2007-02-05
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Publication No.: US20070218848A1Publication Date: 2007-09-20
- Inventor: Serge Drogi , Vikas Vinayak , Mark Gehring , Martin Tomasz
- Applicant: Serge Drogi , Vikas Vinayak , Mark Gehring , Martin Tomasz
- Applicant Address: US CA San Mateo 94403
- Assignee: QUANTANCE, INC.
- Current Assignee: QUANTANCE, INC.
- Current Assignee Address: US CA San Mateo 94403
- Main IPC: H04B1/04
- IPC: H04B1/04 ; H01Q11/12
Abstract:
A system including a phase comparator to compare a first signal and a second signal to generate a phase error signal, and a controller to generate an adjusted phase error signal from the phase error signal in response to an amplitude of at least one of the first signal and the second signal.
Public/Granted literature
- US07869542B2 Phase error de-glitching circuit and method of operating Public/Granted day:2011-01-11
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