Invention Application
US20070221505A1 Method of and Apparatus for Forming Three-Dimensional Structures Integral With Semiconductor Based Circuitry
审中-公开
用于形成与半导体电路一体化的三维结构的方法和装置
- Patent Title: Method of and Apparatus for Forming Three-Dimensional Structures Integral With Semiconductor Based Circuitry
- Patent Title (中): 用于形成与半导体电路一体化的三维结构的方法和装置
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Application No.: US11680596Application Date: 2007-02-28
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Publication No.: US20070221505A1Publication Date: 2007-09-27
- Inventor: Adam Cohen
- Applicant: Adam Cohen
- Assignee: University of Southern California
- Current Assignee: University of Southern California
- Main IPC: C25D5/02
- IPC: C25D5/02

Abstract:
Enhanced Electrochemical fabrication processes are provided that can form three-dimensional multi-layer structures using semiconductor based circuitry as a substrate. Electrically functional portions of the structure are formed from structural material (e.g. nickel) that adheres to contact pads of the circuit. Aluminum contact pads and silicon structures are protected from copper diffusion damage by application of appropriate barrier layers.
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