发明申请
- 专利标题: STATIC TIMING SLACKS ANALYSIS AND MODIFICATION
- 专利标题(中): 静态时序分析与修改
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申请号: US11277385申请日: 2006-03-24
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公开(公告)号: US20070226667A1公开(公告)日: 2007-09-27
- 发明人: Thomas Chadwick , Margaret Charlebois , David Hathaway , Jason Rotella , Douglas Stout , Ivan Wemple
- 申请人: Thomas Chadwick , Margaret Charlebois , David Hathaway , Jason Rotella , Douglas Stout , Ivan Wemple
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06F9/45
摘要:
A method, system and computer program product for analyzing and modifying a static timing slack of a timing path in a static timing analysis of a design of an integrated circuit (IC) with a transient power supply are disclosed. A static timing slack analysis is performed at a selected endpoint in an IC to obtain a candidate timing path leading to the endpoint with a worst static timing slack. A transient static timing slack is determined for the candidate timing path for each clock cycle of a clock signal under the transient power supply. The determined transient static timing slack is used to adjust the timing of the IC and to modify the static timing slack of the candidate timing path.
公开/授权文献
- US07404163B2 Static timing slacks analysis and modification 公开/授权日:2008-07-22