A method removes and/or contains edge residue. A wafer comprised of a semiconductor material having a top surface, a bottom surface and an edge surface is provided. The bottom surface and the top surface are substantially planar and the edge surface is non-planar. Residue can be located on the edge surface, which can dislodge if not addressed and damage devices formed on the wafer. One or more devices can be at least partially formed on the top surface. A pre-metal dielectric liner is formed over the top surface of the wafer and covering at least a portion of the residue. An edge portion of the liner is etched or otherwise removed to expose the portion of the residue. Thereafter, a pre-metal dielectric layer is formed over the top surface of the wafer and the pre-metal dielectric liner. During formation of the pre-metal dielectric layer, the edge residue is removed and/or contained.