发明申请
US20070233429A1 APPARATUS AND METHOD FOR THE DETECTION OF AND RECOVERY FROM INAPPROPRIATE BUS ACCESS IN MICROCONTROLLER CIRCUITS 有权
微处理器电路中不准确的总线接入检测和恢复的装置和方法

  • 专利标题: APPARATUS AND METHOD FOR THE DETECTION OF AND RECOVERY FROM INAPPROPRIATE BUS ACCESS IN MICROCONTROLLER CIRCUITS
  • 专利标题(中): 微处理器电路中不准确的总线接入检测和恢复的装置和方法
  • 申请号: US11426528
    申请日: 2006-06-26
  • 公开(公告)号: US20070233429A1
    公开(公告)日: 2007-10-04
  • 发明人: Alain VergnesRenaud Tiennot
  • 申请人: Alain VergnesRenaud Tiennot
  • 申请人地址: US CA San Jose
  • 专利权人: ATMEL CORPORATION
  • 当前专利权人: ATMEL CORPORATION
  • 当前专利权人地址: US CA San Jose
  • 优先权: FR06/01168 20060209
  • 主分类号: G06F19/00
  • IPC分类号: G06F19/00 G06F17/40
APPARATUS AND METHOD FOR THE DETECTION OF AND RECOVERY FROM INAPPROPRIATE BUS ACCESS IN MICROCONTROLLER CIRCUITS
摘要:
An inappropriate-access module is incorporated in a computer system along with other computer system modules. The inappropriate-access module is connected to a read address decoder and controlling logic located within various other modules. The inappropriate-access module detects inappropriate read accesses or the occurrence of the inappropriate access during operations performed on related sensitive system resources in accompanying computer system modules. The inappropriate-access module produces an inappropriate-access flag, made available to the rest of the system, which invokes responses in the accompanying modules such as a halt in processing and protective measures for system resources. Additionally, a related logic block is able to detect the inappropriate access and produce an inappropriate-access trigger which causes a halt to processing within the logic block as well as in related system modules.
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