发明申请
US20070235849A1 Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation
有权
采用隔离Vss平面的半导体封装和方法，适应高速电路接地隔离
- 专利标题： Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation
- 专利标题（中）： 采用隔离Vss平面的半导体封装和方法，适应高速电路接地隔离
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申请号： US11399723申请日： 2006-04-06
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公开(公告)号： US20070235849A1公开(公告)日： 2007-10-11
- 发明人: Maurice Othieno , Chok Chia , Amar Amin
- 申请人： Maurice Othieno , Chok Chia , Amar Amin
- 专利权人： LSI Logic Corporation
- 当前专利权人： LSI Logic Corporation
- 主分类号： H01L23/02
- IPC分类号： H01L23/02
摘要：
Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated high-speed ground plane that is electrically isolated from the ground plane used to ground the low speed circuitry of the package.
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