发明申请
US20070264584A1 PATTERN ARRANGEMENT METHOD OF SEMICONDUCTOR DEVICE 审中-公开
半导体器件的图案布置方法

PATTERN ARRANGEMENT METHOD OF SEMICONDUCTOR DEVICE
摘要:
A pattern arrangement method of a semiconductor device is provided. In the pattern arrangement method, patterns are classified according to effective pitches and critical dimensions, and pattern dispersion is predicted according to the effective pitches and the critical dimensions by using a statistical analysis of process parameters. Two-dimensional coordinates of the effective pitches and the critical dimensions are constructed, and a dispersion map is made by arranging the predicted pattern dispersion on the corresponding coordinates. By arranging design patterns within a tolerance region of the dispersion map, the patterns satisfying the dispersion tolerance according to the significance of the layer and the design requirements can be arranged.
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