Invention Application
US20070281422A1 Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
有权
通过等离子体蚀刻清洁减轻铁电存储器件中的边缘退化
- Patent Title: Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
- Patent Title (中): 通过等离子体蚀刻清洁减轻铁电存储器件中的边缘退化
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Application No.: US11442810Application Date: 2006-05-30
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Publication No.: US20070281422A1Publication Date: 2007-12-06
- Inventor: Kezhakkedath R. Udayakumar , Lindsey H. Hall , Francis G. Celii , Scott R. Summerfelt
- Applicant: Kezhakkedath R. Udayakumar , Lindsey H. Hall , Francis G. Celii , Scott R. Summerfelt
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.
Public/Granted literature
- US07572698B2 Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean Public/Granted day:2009-08-11
Information query
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