发明申请
US20070283215A1 PARITY CHECK DECODER ARCHITECTURE 有权
奇妙的检查解码器架构

PARITY CHECK DECODER ARCHITECTURE
摘要:
A method and systems for reducing the complexity of a parity checker are described herein. In at least some preferred embodiments, a parity-check decoder includes column store units and one or more alignment units, which are coupled to the column store units. The column store units outnumber the alignments units.
公开/授权文献
信息查询
0/0