发明申请
US20070290752A1 Adjusting methods of arithmetic multiplying circuit, drive circuit, and phase margin
审中-公开
算术乘法电路，驱动电路和相位裕量的调整方法
- 专利标题： Adjusting methods of arithmetic multiplying circuit, drive circuit, and phase margin
- 专利标题（中）： 算术乘法电路，驱动电路和相位裕量的调整方法
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申请号： US11891844申请日： 2007-08-13
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公开(公告)号： US20070290752A1公开(公告)日： 2007-12-20
- 发明人: Katsuhiko Maki
- 申请人： Katsuhiko Maki
- 优先权： JP2003-412270 20031210
- 主分类号： H03F3/45
- IPC分类号： H03F3/45
摘要：
An arithmetic amplifying circuit for driving a capacitive load is provided including a voltage follower circuit converting an input signal to impedance, and a resistance circuit which is serially connected between the voltage follower circuit and an output of the arithmetic amplifying circuit. The voltage follower circuit includes a differential section, which amplifies a differential between the input signal and the output signal of the voltage follower circuit, and an output section, which outputs the output signal of the voltage follower circuit based on an output of the differential section, and drives a capacitive load via the resistance circuit.