System for a memory device. An electronic device includes a non-volatile memory array. The non-volatile memory array includes a first transistor and a second transistor. The first and second transistors have a shared doped region. A first word line is formed along a first axis. The first word line includes a first gate electrode for the first transistor and a second gate electrode for the second transistor. The non-volatile memory array includes a bit line formed along a second axis. The first axis is perpendicular to the second axis. The bit line is electrically connected to the shared doped region.