A Plasma Display Panel (PDP) capable of reducing the number of address electrodes for each pixel, includes: a first substrate; a second substrate facing the first substrate; a plurality of discharge cells partitioned between the first and second substrates; address electrodes formed along a first direction between the first and second substrates; and display electrodes formed along a second direction crossing the first direction and separated from the address electrodes between the first and second substrates. At least two discharge cells among the plurality of discharge cells included in a respective pixel correspond to and are driven by the same address electrode, and the number of pixels that are arranged in a row along the second direction and enable a resolution of Rh×Rv is at least Rh/1.25, Rv being the number of pixels arranged along the first direction and Rh being the number of pixels arranged along the second direction.