发明申请
- 专利标题: Manufacturing method package substrate
- 专利标题(中): 制造方法封装衬底
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申请号: US11785093申请日: 2007-04-13
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公开(公告)号: US20070298546A1公开(公告)日: 2007-12-27
- 发明人: Jong-Jin Lee , Sun-Moon Kim , Mi-Seon Shin , Yong-Bin Lee
- 申请人: Jong-Jin Lee , Sun-Moon Kim , Mi-Seon Shin , Yong-Bin Lee
- 申请人地址: KR Suwon
- 专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人地址: KR Suwon
- 优先权: KR10-2006-0055833 20060621
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/44
摘要:
A manufacturing method of a package substrate is disclosed. The method for manufacturing a package substrate is by forming a bump on a bump pad in a core board, where a first circuit pattern including the bump pad is formed on one surface, a second circuit pattern electrically connected with the first circuit pattern is formed on the other surface, and a dielectric layer is selectively coated on the one surface such that the bump pad is exposed. The method includes layering a conductive layer on the other surface of the core board, coating a plating resist on the conductive layer, forming the bump by supplying electricity to the conductive layer to electroplate the bump pad, and removing the plating resist and the conductive layer. This makes it possible to omit the coining process and increase the density of the circuit by forming a fine bump by an electro tin plating method with small plating thickness deviation without designing additional plating bus lines, and improves the electrical performance without remaining plating bus lines.
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