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44 条记录 (耗时 0.028 秒)

    Manufacturing method package substrate
    1.
    发明申请
    Manufacturing method package substrate 审中-公开
    制造方法封装衬底

    公开(公告)号：US20070298546A1

    公开(公告)日：2007-12-27

    申请号：US11785093

    申请日：2007-04-13

    申请人： Jong-Jin Lee ,  Sun-Moon Kim ,  Mi-Seon Shin ,  Yong-Bin Lee

    发明人： Jong-Jin Lee ,  Sun-Moon Kim ,  Mi-Seon Shin ,  Yong-Bin Lee

    IPC分类号： H01L21/00 ,  H01L21/44

    CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3473 ,  H05K3/42 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/1581 ,  H01L2224/05599

    摘要： A manufacturing method of a package substrate is disclosed. The method for manufacturing a package substrate is by forming a bump on a bump pad in a core board, where a first circuit pattern including the bump pad is formed on one surface, a second circuit pattern electrically connected with the first circuit pattern is formed on the other surface, and a dielectric layer is selectively coated on the one surface such that the bump pad is exposed. The method includes layering a conductive layer on the other surface of the core board, coating a plating resist on the conductive layer, forming the bump by supplying electricity to the conductive layer to electroplate the bump pad, and removing the plating resist and the conductive layer. This makes it possible to omit the coining process and increase the density of the circuit by forming a fine bump by an electro tin plating method with small plating thickness deviation without designing additional plating bus lines, and improves the electrical performance without remaining plating bus lines.

    摘要翻译： 公开了封装基板的制造方法。 制造封装衬底的方法是通过在芯板上的凸块焊盘上形成凸块，其中在一个表面上形成包括凸点焊盘的第一电路图案，与第一电路图形电连接的第二电路图案形成在 另一表面和电介质层被选择性地涂覆在一个表面上，使得凸块焊盘露出。 该方法包括在芯板的另一个表面上层叠导电层，在导电层上涂覆电镀抗蚀剂，通过向导电层供电以形成凸块以电镀凸块焊盘，以及去除电镀抗蚀剂和导电层 。 这样可以省略压印过程，并且通过在不设计附加的电镀母线的情况下通过电镀镀层方法形成微小的凸起来提高电路的密度，并且不需要剩余的电镀母线即可提高电气性能。

    Memory devices and methods of manufacturing the same
    5.
    发明申请
    Memory devices and methods of manufacturing the same 审中-公开
    存储器件及其制造方法

    公开(公告)号：US20080105927A1

    公开(公告)日：2008-05-08

    申请号：US11711117

    申请日：2007-02-27

    申请人： Young-Joon Ahn ,  Jong-Jin Lee

    发明人： Young-Joon Ahn ,  Jong-Jin Lee

    IPC分类号： H01L29/94 ,  H01L21/336

    CPC分类号： H01L27/11521 ,  H01L21/764 ,  H01L27/115 ,  H01L29/40114

    摘要： The memory device includes upper gate structures and lower gate structures formed on an active region of a substrate, and an insulation layer. Each of the upper gate structures may have a blocking layer pattern and a control gate electrode. Each of the lower gate structures may have a tunnel insulation layer pattern and a floating gate electrode. The floating gate electrode may include a lower portion that is narrower than an upper portion contacting with the upper gate structure. The insulation layer may cover gate structures formed of the lower and upper gate structures, and may include air gaps between adjacent gate structures.

    摘要翻译： 存储器件包括形成在衬底的有源区上的上栅极结构和下栅极结构以及绝缘层。 每个上部栅极结构可以具有阻挡层图案和控制栅电极。 每个下栅极结构可以具有隧道绝缘层图案和浮栅电极。 浮栅电极可以包括比与上栅极结构接触的上部更窄的下部。 绝缘层可以覆盖由下部和上部栅极结构形成的栅极结构，并且可以包括相邻栅极结构之间的气隙。

    Memory device and method of manufacturing the same
    6.
    发明申请
    Memory device and method of manufacturing the same 有权
    存储器件及其制造方法

    公开(公告)号：US20080067580A1

    公开(公告)日：2008-03-20

    申请号：US11710488

    申请日：2007-02-26

    申请人： Young-Joon Ahn ,  Suk-Pil Kim ,  Jong-Jin Lee

    发明人： Young-Joon Ahn ,  Suk-Pil Kim ,  Jong-Jin Lee

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/4991 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/792

    摘要： In a memory device and a method of manufacturing the memory device, a pair of channel layers included in the memory device may be formed on a sidewall of the sacrificial single crystalline layer pattern located on a protrusion of a semiconductor substrate. Accordingly, an etch damage may be reduced at the channel layer. The sacrificial single crystalline layer pattern may be removed to generate a void between the pair of the channel layers. As a result, a generation of a coupling effect may be reduced between the channel layers.

    摘要翻译： 在存储器件和存储器件的制造方法中，包括在存储器件中的一对沟道层可以形成在位于半导体衬底的突起上的牺牲单晶层图案的侧壁上。 因此，在沟道层可能会减少蚀刻损伤。 可以去除牺牲单晶层图案以在一对通道层之间产生空隙。 结果，可以在沟道层之间产生耦合效应。

    Method of driving an image sensor with blooming current
    8.
    发明授权
    Method of driving an image sensor with blooming current 有权
    用鲜花电流驱动图像传感器的方法

    公开(公告)号：US08593550B2

    公开(公告)日：2013-11-26

    申请号：US12313350

    申请日：2008-11-19

    申请人： Jong-Jin Lee ,  Ju-Hyun Ko ,  Jung-Chak Ahn

    发明人： Jong-Jin Lee ,  Ju-Hyun Ko ,  Jung-Chak Ahn

    IPC分类号： H04N5/335

    CPC分类号： H04N5/361 ,  H01L27/14656 ,  H04N5/3594

    摘要： For driving an image sensor having a pixel with a transfer gate formed between a photo-detector and a floating diffusion region, a noise-reducing voltage is applied on the transfer gate during a first period of an integration mode. A blooming current voltage is applied on the transfer gate during a second period of the integration mode. A read voltage is applied on the transfer gate during a read mode after the integration mode. The read voltage has a higher magnitude than the blooming current voltage. With application of the noise-reducing voltage, noise is reduced and a dynamic range is extended for the image sensor.

    摘要翻译： 为了驱动具有形成在光电检测器和浮动扩散区域之间的传输门的像素的图像传感器，在积分模式的第一周期期间，在传输门上施加降噪电压。 在积分模式的第二周期期间，在传输门上施加开花电流电压。 在积分模式之后的读取模式下，在传输门上施加读取电压。 读取电压的幅度比起霜电流电压高。 通过应用降噪电压，噪声降低，图像传感器的动态范围扩大。

    THREE-DIMENSIONAL IMAGE DATA DISPLAY CONTROLLER AND THREE-DIMENSIONAL IMAGE DATA DISPLAY SYSTEM
    9.
    发明申请
    THREE-DIMENSIONAL IMAGE DATA DISPLAY CONTROLLER AND THREE-DIMENSIONAL IMAGE DATA DISPLAY SYSTEM 审中-公开
    三维图像数据显示控制器和三维图像数据显示系统

    公开(公告)号：US20120194512A1

    公开(公告)日：2012-08-02

    申请号：US13348198

    申请日：2012-01-11

    申请人： Kyoung-Man Kim ,  Jong-Ho Roh ,  Jong-Jin Lee

    发明人： Kyoung-Man Kim ,  Jong-Ho Roh ,  Jong-Jin Lee

    IPC分类号： G06T15/00

    CPC分类号： G06T15/503 ,  H04N13/161 ,  H04N13/305 ,  H04N13/31 ,  H04N13/324 ,  H04N13/337 ,  H04N13/341 ,  H04N13/398

    摘要： A display controller can include a blending coefficient storing unit and an image mixing unit. The blending coefficient storing unit can store blending coefficients. The image mixing unit can receive left-eye image data and right-eye image data, and generate three-dimensional image data by performing a blending operation on the left-eye image data and the right-eye image data using the blending coefficients stored in the blending coefficient storing unit.

    摘要翻译： 显示控制器可以包括混合系数存储单元和图像混合单元。 混合系数存储单元可以存储混合系数。 图像混合单元可以接收左眼图像数据和右眼图像数据，并且通过使用存储在左眼图像数据和右眼图像数据中的混合系数对左眼图像数据和右眼图像数据执行混合操作来生成三维图像数据 混合系数存储单元。

    PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF 审中-公开
    印刷电路板及其制造方法

    公开(公告)号：US20100147575A1

    公开(公告)日：2010-06-17

    申请号：US12614057

    申请日：2009-11-06

    申请人： Han-Ul Lee ,  Young-Hwan Shin ,  Jong-Jin Lee

    发明人： Han-Ul Lee ,  Young-Hwan Shin ,  Jong-Jin Lee

    IPC分类号： H05K1/11 ,  C25D5/02

    CPC分类号： H05K1/119 ,  H05K3/0038 ,  H05K3/427 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K2203/1572

    摘要： A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board can include: processing a first hole, which has a tapered shape, in one side of a substrate by using a laser drill; processing a second hole, which has a tapered shape and which connects with the first hole, in the other side of the substrate by using a laser drill in a position corresponding to that of the first hole; and forming a conductive portion, which electrically connects both sides of the substrate through the first hole and the second hole, by performing plating. This method may be used for providing reliable interlayer connections.

    摘要翻译： 公开了印刷电路板和印刷电路板的制造方法。 制造印刷电路板的方法可以包括：通过使用激光钻孔在基板的一侧处理具有锥形形状的第一孔; 通过使用激光钻头处理与第一孔相对应的位置，在基板的另一侧处理具有锥形形状并与第一孔连接的第二孔; 并且通过执行电镀形成导电部分，其通过第一孔和第二孔电连接基板的两侧。 该方法可用于提供可靠的层间连接。