发明申请
- 专利标题: STACKING FAULT REDUCTION IN EPITAXIALLY GROWN SILICON
- 专利标题(中): 封装在外延硅中的故障减少
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申请号: US11456326申请日: 2006-07-10
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公开(公告)号: US20080006876A1公开(公告)日: 2008-01-10
- 发明人: Yun-Yu Wang , Linda Black , Judson R. Holt , Woo-Hyeong Lee , Scott Luning , Christopher D. Sheraw
- 申请人: Yun-Yu Wang , Linda Black , Judson R. Holt , Woo-Hyeong Lee , Scott Luning , Christopher D. Sheraw
- 申请人地址: US NY Armonk US CA Sunnyvale
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION,ADVANCED MICRO DEVICES, INC.
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION,ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址: US NY Armonk US CA Sunnyvale
- 主分类号: H01L27/12
- IPC分类号: H01L27/12 ; H01L27/01 ; H01L31/0392
摘要:
Methods and a structure are disclosed for providing stacking fault reduced epitaxially grown silicon for use in hybrid surface orientation structures. In one embodiment, a method includes depositing a silicon nitride liner over a silicon oxide liner in an opening, etching to remove the silicon oxide liner and silicon nitride liner on a lower surface of the opening, undercutting the silicon nitride liner adjacent to the lower surface, and epitaxially growing silicon in the opening. The silicon is substantially reduced of stacking faults because of the negative slope created by the undercut.
公开/授权文献
- US07893493B2 Stacking fault reduction in epitaxially grown silicon 公开/授权日:2011-02-22
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