Invention Application
- Patent Title: Method of manufacturing a memory device
- Patent Title (中): 制造存储器件的方法
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Application No.: US11820516Application Date: 2007-06-20
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Publication No.: US20080014729A1Publication Date: 2008-01-17
- Inventor: Woong Lee , Jung-Geun Jee , Hyoeng-Ki Kim , Jung-Hyun Park , Ho-Min Son , Won-Jun Jang
- Applicant: Woong Lee , Jung-Geun Jee , Hyoeng-Ki Kim , Jung-Hyun Park , Ho-Min Son , Won-Jun Jang
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2006-0065212 20060712
- Main IPC: H01L21/3205
- IPC: H01L21/3205

Abstract:
In a method of manufacturing a memory device, a tunnel insulation layer and a floating gate layer are formed on a semiconductor substrate. A top surface of the floating gate layer is converted into a first nitride layer by a first nitridation treatment process. The first nitride layer is converted into a first oxynitride layer by a radical oxidation process. A lower oxide layer is formed on the first oxynitride layer by an LPCVD process. A second nitride layer and an upper oxide layer are formed on the lower oxide layer. A conductive layer is formed on the upper oxide layer. Thus, a multi-layered dielectric layer including the first oxynitride layer, the lower oxide layer, the second nitride layer, the upper oxide layer and the densified second oxynitride layer may have an increased capacitance without having degenerated leakage current characteristics.
Information query
IPC分类: