发明申请
- 专利标题: PAD STRUCTURE DESIGN WITH REDUCED DENSITY
- 专利标题(中): PAD结构设计与降低密度
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申请号: US11458501申请日: 2006-07-19
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公开(公告)号: US20080020559A1公开(公告)日: 2008-01-24
- 发明人: Hsien-Wei Chen , Anbiarshy Wu , Shih-Hsun Hsu , Shang-Yun Hou , Hsueh-Chung Chen , Shin-Puu Jeng
- 申请人: Hsien-Wei Chen , Anbiarshy Wu , Shih-Hsun Hsu , Shang-Yun Hou , Hsueh-Chung Chen , Shin-Puu Jeng
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
An interconnect structure includes at least a first interconnect layer and a second interconnect layer. Each of the first and second interconnect layers has a pad structure and each pad structure has a respective pad density. The pad density of the pad structure of the second interconnect layer is different from the pad density of the pad structure of the first interconnect layer. The pad structures of the first and second interconnect layers are connected to each other.
公开/授权文献
- US07714443B2 Pad structure design with reduced density 公开/授权日:2010-05-11
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