- 专利标题: Method of manufacturing a semiconductor device
-
申请号: US11882199申请日: 2007-07-31
-
公开(公告)号: US20080032453A1公开(公告)日: 2008-02-07
- 发明人: Shinji Tojo , Shinya Kanamitsu , Seiichi Ichihara
- 申请人: Shinji Tojo , Shinya Kanamitsu , Seiichi Ichihara
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 优先权: JP2001-311540 20011009
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
Salient electrodes on a semiconductor chip and leads on a film substrate are to be connected together with a high accuracy. A change in lead pitch which occurs at the time of connecting salient electrodes on a semiconductor chip and inner leads on a film substrate with each other is taken into account and a correction is made beforehand to the pitch of the inner leads. Likewise, a change in lead pitch which occurs at the time of connecting electrodes on a liquid crystal substrate and outer leads on the film substrate with each other is taken into account and a correction is made beforehand to the pitch of the outer leads.
公开/授权文献
- US07470568B2 Method of manufacturing a semiconductor device 公开/授权日:2008-12-30
信息查询
IPC分类: