According to one exemplary embodiment, a transistor includes a channel region situated adjacent to a field oxide region. The transistor further includes a gate have a first portion situated over the channel region and a second portion situated over the field oxide region. The transistor further includes at least one gate contact situated on the second portion of the gate, where the second portion of the gate does not reduce a channel width of the channel region, and where the second portion of the gate does not increase gate resistance. According to this exemplary embodiment, the transistor further includes a drain active region, where the drain active region is surrounded by the gate. The transistor further includes a source active region surrounding the gate. The transistor further includes a well, where the channel region is situated between the well and the source active region.