发明申请
- 专利标题： POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
- 专利标题（中）： 在IC卡顶部的盲插互连方案
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申请号： US11877658申请日： 2007-10-23
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公开(公告)号： US20080042297A1公开(公告)日： 2008-02-21
- 发明人: Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
- 申请人： Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
- 申请人地址： TW Hsinchu 300
- 专利权人： MEGICA CORPORATION
- 当前专利权人： MEGICA CORPORATION
- 当前专利权人地址： TW Hsinchu 300
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric and a thick second layer of dielectric is created over the surface of the layer of passivation. Thick and wide post-passivation interconnect lines are created in the thick second layer of dielectric. The first layer of dielectric may also be eliminated, creating the wide thick passivation interconnect network on the surface of the layer of passivation that has been deposited over the surface of a substrate.