发明申请
- 专利标题: DISTRIBUTED MICRO INSTRUCTION SET PROCESSOR ARCHITECTURE FOR HIGH-EFFICIENCY SIGNAL PROCESSING
- 专利标题(中): 分布式微指令集处理器架构实现高效信号处理
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申请号: US11841604申请日: 2007-08-20
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公开(公告)号: US20080084850A1公开(公告)日: 2008-04-10
- 发明人: Song Chen , Paul Chou , Christopher Woodthorpe , Venugopal Balasubramonian , Keith Rieken
- 申请人: Song Chen , Paul Chou , Christopher Woodthorpe , Venugopal Balasubramonian , Keith Rieken
- 申请人地址: DE Neubiberg 85579
- 专利权人: INFINEON TECHNOLOGIES AG
- 当前专利权人: INFINEON TECHNOLOGIES AG
- 当前专利权人地址: DE Neubiberg 85579
- 主分类号: H04B7/216
- IPC分类号: H04B7/216 ; H04J3/06
摘要:
A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.
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