公开(公告)号：US07627031B2

公开(公告)日：2009-12-01

申请号：US11186241

申请日：2005-07-21

申请人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

发明人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

IPC分类号： H03H7/30

CPC分类号： H04L7/0062 ,  H04L7/0029 ,  H04L25/03057 ,  H04L2025/03503

摘要： An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

摘要翻译： 一种用于自适应地引入与数据符号判定电路的信号等待时间相关的补偿信号延迟的装置和方法。 自适应定时控制电路，包括实现为具有相关抽头系数的抽头延迟线的内插混频器，自适应地和基本上匹配数据判决电路的等待时间以在自适应均衡器内使用，从而最小化这样的均方误差 决策电路。 该自适应等待时间用于产生反馈误差信号，反馈误差信号又可由前馈均衡器用于动态调整其自适应滤波器抽头系数。

公开(公告)号：US20080084850A1

公开(公告)日：2008-04-10

申请号：US11841604

申请日：2007-08-20

申请人： Song Chen ,  Paul Chou ,  Christopher Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

发明人： Song Chen ,  Paul Chou ,  Christopher Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

IPC分类号： H04B7/216 ,  H04J3/06

CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

摘要： A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

摘要翻译： 无线通信系统根据通信协议承载多个进程。 该系统包括为该过程提供计算支持的特定于应用程序的指令集处理器（ASISP）。 每个ASISP能够执行通信协议的功能的子集。 调度程序用于以时间分片算法调度ASISP，以便每个ASISP支持多个进程。 在这种体系结构中，ASISP在任何给定的时间主动执行一个受支持进程（活动进程）的计算。 由特定ASISP支持的每个进程的状态信息存储在与ASISP唯一相关联的存储体中。 当调度器指示ASISP改变哪个进程是活动进程时，将非活动进程的状态信息存储在存储体中，并且从存储体检索新激活的进程的状态信息。

公开(公告)号：US07266145B2

公开(公告)日：2007-09-04

申请号：US10321876

申请日：2002-12-17

申请人： Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Edem Ibragimov ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Qian Yu

发明人： Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Edem Ibragimov ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Qian Yu

IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159

CPC分类号： H04L25/03057 ,  H03H21/0012 ,  H03H2021/0096 ,  H04L7/0029 ,  H04L7/0062 ,  H04L7/0079 ,  H04L2025/0349 ,  H04L2025/03611

摘要： An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

摘要翻译： 一种具有前馈滤波器的自适应信号均衡器，其中反馈误差信号和相应的输入数据信号在时间上使用信号插值动态对准，此外，控制前驱/后沿滤波器抽头配置，由此产生更多的自适应滤波器抽头系数信号， 显着改善和鲁棒的信号均衡。

公开(公告)号：US08526965B2

公开(公告)日：2013-09-03

申请号：US13531016

申请日：2012-06-22

申请人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

发明人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

IPC分类号： H04Q7/20 ,  H04W72/00

CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

摘要： A wireless communication base station comprising a plurality of application specific instruction set processors (ASISPs) configured to support one or more processes hosted by the base station, and to track process state information associated with each of the processes; and a memory configured to store the tracked process state information, and when an ASISP of the plurality of ASISPs is reallocated from a first process to a second process, the respective ASISP is configured to retrieve from the memory process state information for the second process.

摘要翻译： 一种无线通信基站，包括被配置为支持所述基站所托管的一个或多个进程的多个应用特定指令集处理器（ASISP），并且跟踪与每个所述进程相关联的进程状态信息; 以及存储器，被配置为存储跟踪的处理状态信息，并且当多个ASISP的ASISP从第一进程重新分配到第二进程时，相应的ASISP被配置为从存储器检索用于第二进程的状态信息。

公开(公告)号：US07561617B1

公开(公告)日：2009-07-14

申请号：US11859649

申请日：2007-09-21

申请人： Abhijit G. Shanbhag ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Prashant Choudhary ,  Edem Ibragimov ,  Venugopal Balasubramonian ,  Qian Yu ,  Madabusi Govindarajan

发明人： Abhijit G. Shanbhag ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Prashant Choudhary ,  Edem Ibragimov ,  Venugopal Balasubramonian ,  Qian Yu ,  Madabusi Govindarajan

IPC分类号： H03H7/30

CPC分类号： H04L25/03063 ,  H04L25/03044 ,  H04L2025/03617

摘要： Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.

摘要翻译： 公开了系统和方法来为通信信道提供信道监测和/或性能监测。 例如，根据本发明的实施例，公开了一种对于信道失真进行均衡的均衡器，并且还提供信道和性能监视信息，例如带宽估计，信道识别，信噪比，色散 ，和/或偏振模色散。

公开(公告)号：US20070230557A1

公开(公告)日：2007-10-04

申请号：US11759720

申请日：2007-06-07

申请人： Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Edem Ibragimov ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit Shanbhag ,  Qian Yu

发明人： Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Edem Ibragimov ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit Shanbhag ,  Qian Yu

IPC分类号： H03H7/40

CPC分类号： H04L25/03057 ,  H03H21/0012 ,  H03H2021/0096 ,  H04L7/0029 ,  H04L7/0062 ,  H04L7/0079 ,  H04L2025/0349 ,  H04L2025/03611

摘要： An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

摘要翻译： 一种具有前馈滤波器的自适应信号均衡器，其中反馈误差信号和相应的输入数据信号在时间上使用信号插值动态对准，此外，控制前驱/后沿滤波器抽头配置，由此产生更多的自适应滤波器抽头系数信号， 显着改善和鲁棒的信号均衡。

公开(公告)号：US20050271138A1

公开(公告)日：2005-12-08

申请号：US11186241

申请日：2005-07-21

申请人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

发明人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

IPC分类号： H04L7/02 ,  H04L25/03 ,  H03H7/30

CPC分类号： H04L7/0062 ,  H04L7/0029 ,  H04L25/03057 ,  H04L2025/03503

摘要： An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

公开(公告)号：US06940898B2

公开(公告)日：2005-09-06

申请号：US10290571

申请日：2002-11-08

申请人： Abhijit G. Shanbhag ,  Qian Yu ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Fabian Giroud ,  Venugopal Balasubramonian

发明人： Abhijit G. Shanbhag ,  Qian Yu ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Fabian Giroud ,  Venugopal Balasubramonian

IPC分类号： H03H21/00 ,  H04L25/03 ,  H03H7/30 ,  H03H7/40 ,  H03K5/159

CPC分类号： H04L25/0307 ,  H03H21/0012 ,  H03H2021/0096 ,  H04L25/03063 ,  H04L2025/0349 ,  H04L2025/03509 ,  H04L2025/03611

摘要： An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

摘要翻译： 一种用于具有分数间隔反馈的自适应信号均衡器中的自适应系数信号发生器。 代表反馈抽头系数的信号与定时内插参数一起产生，使得分数间隔的反馈电路动态地仿真符号间隔反馈电路。

公开(公告)号：US06922440B2

公开(公告)日：2005-07-26

申请号：US10321893

申请日：2002-12-17

申请人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov

发明人： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov

IPC分类号： H04L7/02 ,  H04L25/03 ,  H04L25/17

CPC分类号： H04L7/0062 ,  H04L7/0029 ,  H04L25/03057 ,  H04L2025/03503

摘要： An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

摘要翻译： 一种用于自适应地引入与数据符号判定电路的信号等待时间相关的补偿信号延迟的装置和方法。 自适应定时控制电路，包括实现为具有相关抽头系数的抽头延迟线的内插混频器，自适应地和基本上匹配数据判决电路的等待时间以在自适应均衡器内使用，从而最小化这样的均方误差 决策电路。 该自适应等待时间用于产生反馈误差信号，反馈误差信号又可由前馈均衡器用于动态调整其自适应滤波器抽头系数。

公开(公告)号：US20120272042A1

公开(公告)日：2012-10-25

申请号：US13531016

申请日：2012-06-22

申请人： Song CHEN ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

发明人： Song CHEN ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

IPC分类号： G06F15/76

CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

摘要： A wireless communication base station comprising a plurality of application specific instruction set processors (ASISPs) configured to support one or more processes hosted by the base station, and to track process state information associated with each of the processes; and a memory configured to store the tracked process state information, and when an ASISP of the plurality of ASISPs is reallocated from a first process to a second process, the respective ASISP is configured to retrieve from the memory process state information for the second process.

摘要翻译： 一种无线通信基站，包括被配置为支持所述基站所托管的一个或多个进程的多个应用特定指令集处理器（ASISP），并且跟踪与每个所述进程相关联的进程状态信息; 以及存储器，被配置为存储跟踪的处理状态信息，并且当多个ASISP的ASISP从第一进程重新分配到第二进程时，相应的ASISP被配置为从存储器检索用于第二进程的状态信息。