Invention Application
US20080087986A1 Materials, structures and methods for microelectronic packaging 有权
微电子封装的材料,结构和方法

  • Patent Title: Materials, structures and methods for microelectronic packaging
  • Patent Title (中): 微电子封装的材料,结构和方法
  • Application No.: US11986998
    Application Date: 2007-11-27
  • Publication No.: US20080087986A1
    Publication Date: 2008-04-17
  • Inventor: Ravindra Tanikella
  • Applicant: Ravindra Tanikella
  • Main IPC: H01L23/532
  • IPC: H01L23/532 H01L23/52
Materials, structures and methods for microelectronic packaging
Abstract:
Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.
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