- 专利标题: Chip-level or symbol-level equalizer structure for multiple transmit and receiver antenna configurations
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申请号: US11986802申请日: 2007-11-26
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公开(公告)号: US20080089403A1公开(公告)日: 2008-04-17
- 发明人: Kari Hooli , Kai Kiiskila , Jari Ylioinas , Markku Juntti
- 申请人: Kari Hooli , Kai Kiiskila , Jari Ylioinas , Markku Juntti
- 专利权人: Nokia Corporation
- 当前专利权人: Nokia Corporation
- 主分类号: H04L27/01
- IPC分类号: H04L27/01
摘要:
Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.
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