公开(公告)号：US20050180493A1

公开(公告)日：2005-08-18

申请号：US10783049

申请日：2004-02-19

申请人： Kari Hooli ,  Kai Kiiskila ,  Jari Ylioinas ,  Markku Juntti

发明人： Kari Hooli ,  Kai Kiiskila ,  Jari Ylioinas ,  Markku Juntti

IPC分类号： H04B1/707 ,  H04B7/02 ,  H04B7/06 ,  H04J99/00 ,  H04L25/03

CPC分类号： H04B1/7105 ,  H04B7/02 ,  H04B2201/709727

摘要： Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.

摘要翻译： 公开了适用于WCDMA下行链路上的多发射和接收机天线体系结构的芯片级或符号级均衡器结构。 均衡器结构考虑了天线间干扰和多接入干扰性质的差异，并抑制天线间干扰和多接入干扰（MAI）。 通过合理的实现复杂度实现增强的接收机性能。 根据本发明，使用CDMA接收机架构能够实现最终用户增加的数据速率。 CDMA接收机架构也可以结合时空发射分集（STTD）系统架构来应用。

公开(公告)号：US20080089403A1

公开(公告)日：2008-04-17

申请号：US11986802

申请日：2007-11-26

申请人： Kari Hooli ,  Kai Kiiskila ,  Jari Ylioinas ,  Markku Juntti

发明人： Kari Hooli ,  Kai Kiiskila ,  Jari Ylioinas ,  Markku Juntti

IPC分类号： H04L27/01

CPC分类号： H04L25/03044 ,  H04B1/7097 ,  H04B2201/709727 ,  H04L25/0226 ,  H04L2025/03426 ,  H04L2025/03509 ,  H04L2025/03617

摘要： Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.

公开(公告)号：US07324583B2

公开(公告)日：2008-01-29

申请号：US10783049

申请日：2004-02-19

申请人： Kari Hooli ,  Kai Kiiskilä ,  Jari Ylioinas ,  Markku Juntti

发明人： Kari Hooli ,  Kai Kiiskilä ,  Jari Ylioinas ,  Markku Juntti

IPC分类号： H04B1/00 ,  H04B7/02

CPC分类号： H04B1/7105 ,  H04B7/02 ,  H04B2201/709727

摘要： Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.

摘要翻译： 公开了适用于WCDMA下行链路上的多发射和接收机天线体系结构的芯片级或符号级均衡器结构。 均衡器结构考虑了天线间干扰和多接入干扰性质的差异，并抑制天线间干扰和多接入干扰（MAI）。 通过合理的实现复杂度实现增强的接收机性能。 根据本发明，使用CDMA接收机架构能够实现最终用户增加的数据速率。 CDMA接收机架构也可以结合时空发射分集（STTD）系统架构来应用。