发明申请
- 专利标题： COMPENSATING FOR LAYOUT DIMENSION EFFECTS IN SEMICONDUCTOR DEVICE MODELING
- 专利标题（中）： 补偿半导体器件建模中的布局尺寸效应
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申请号： US11537390申请日： 2006-09-29
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公开(公告)号： US20080104550A1公开(公告)日： 2008-05-01
- 发明人: Akif Sultan , Jian Chen , Mark W. Michael , Jingrong R. Zhou
- 申请人： Akif Sultan , Jian Chen , Mark W. Michael , Jingrong R. Zhou
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method includes receiving design data associated with an integrated circuit device. The integrated circuit device includes a first element having a corner defined therein and a second element overlapping the first element. A dimension specified for the first element in the design data is adjusted based on a distance between the second element and the corner. The integrated circuit device is simulated based on the adjusted dimension.
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