发明申请
- 专利标题: HIGH-PERFORMANCE FET DEVICE LAYOUT
- 专利标题(中): 高性能FET器件布局
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申请号: US11550818申请日: 2006-10-19
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公开(公告)号: US20080109770A1公开(公告)日: 2008-05-08
- 发明人: Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
- 申请人: Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A fast FET and a method and system for designing the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
公开/授权文献
- US07689946B2 High-performance FET device layout 公开/授权日:2010-03-30