发明申请
- 专利标题: INFORMATION PROCESSING APPARATUS AND PHASE CONTROL METHOD
- 专利标题(中): 信息处理装置和相位控制方法
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申请号: US11945573申请日: 2007-11-27
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公开(公告)号: US20080122503A1公开(公告)日: 2008-05-29
- 发明人: Hayato Okuda , Hiroyuki Matsuo
- 申请人: Hayato Okuda , Hiroyuki Matsuo
- 申请人地址: JP Kawasaki-shi
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki-shi
- 优先权: JP2006-322413 20061129
- 主分类号: H03L7/00
- IPC分类号: H03L7/00
摘要:
An apparatus includes plural combinations of a clock supplier and a clock supply destination supplied with a clock from the clock supplier. The clock supply destination includes a return route through which the clock supply destination returns a clock to a corresponding clock supplier. The clock supplier includes a variable delay unit that adds a delay to the clock to be supplied to a corresponding clock supply destination; a comparison-reference-clock supply unit that supplies a comparison reference clock having the same phase as that of a comparison reference clock supplied from other clock supplier; a phase comparator that compares the phase of a return clock returned from a corresponding clock supply destination with that of the comparison reference clock; and a phase-difference control unit that controls the delay, so that the phases of the return clock and the comparison reference clock coincide with each other, based on the comparison result.
公开/授权文献
- US07800421B2 Information processing apparatus and phase control method 公开/授权日:2010-09-21
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