发明申请
US20080141229A1 PROCESSOR, PROGRAM CONVERSION APPARATUS, PROGRAM CONVERSION METHOD, AND COMPUTER PROGRAM
审中-公开
处理器,程序转换装置,程序转换方法和计算机程序
- 专利标题: PROCESSOR, PROGRAM CONVERSION APPARATUS, PROGRAM CONVERSION METHOD, AND COMPUTER PROGRAM
- 专利标题(中): 处理器,程序转换装置,程序转换方法和计算机程序
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申请号: US11969083申请日: 2008-01-03
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公开(公告)号: US20080141229A1公开(公告)日: 2008-06-12
- 发明人: Taketo Heishi , Hajime Ogawa , Shuichi Takayama , Toshiyuki Sakata , Shohei Michimoto
- 申请人: Taketo Heishi , Hajime Ogawa , Shuichi Takayama , Toshiyuki Sakata , Shohei Michimoto
- 优先权: JPJP2002-174927 20020614
- 主分类号: G06F9/45
- IPC分类号: G06F9/45 ; G06F9/312
摘要:
The first, second, and third operating units 441 to 443 each perform a predetermined operation according to an instruction before a point of time partway through a clock cycle. When having performed a comparison operation, each operating unit outputs a result value to the condition flag operating unit 51. The condition flag operating unit 51 calculates a new condition flag value by performing a logical operation on either (a) a value that has been read from the condition flag register 46 and the result value or (b) the result values themselves. The condition flag operating unit 51 outputs, before the clock cycle ends, the new condition flag value to one of the first, second, and third gates 451 to 453 that is related to a conditional instruction so as to control nullification of the conditional new condition flag value.
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