发明申请
- 专利标题： Semiconductor Chip Assembly And Fabrication Method Therefor
- 专利标题（中）： 半导体芯片组装及其制造方法
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申请号： US11722925申请日： 2005-12-28
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公开(公告)号： US20080150133A1公开(公告)日： 2008-06-26
- 发明人: Kojiro Nakamura , Hidenobu Nishikawa , Kentaro Kumazawa
- 申请人： Kojiro Nakamura , Hidenobu Nishikawa , Kentaro Kumazawa
- 申请人地址： JP Osaka
- 专利权人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- 当前专利权人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- 当前专利权人地址： JP Osaka
- 优先权： JP2004-379604 20041228
- 国际申请： PCT/JP2005/024052 WO 20051228
- 主分类号： H01L23/488
- IPC分类号： H01L23/488 ; H01L21/60
摘要：
A semiconductor chip dual-sided assembly which has a higher degree of reliability of connections between semiconductor chips and a circuit substrate is realized. This is achieved by the assembly including a plurality of upper side pads (2a) provided on a substrate upper surface (1a); a plurality of lower side pads (2b) provided on a substrate lower surface (1b) corresponding to the upper side pads (2a) across the substrate (1), respectively; a first semiconductor chip (4) having first bumps (8a) joined to the upper side pads (2a), respectively; and a second semiconductor chip (5) having second bumps (8b) joined to the lower side pads (2b), respectively.
公开/授权文献
- US08035225B2 Semiconductor chip assembly and fabrication method therefor 公开/授权日：2011-10-11
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