发明申请
- 专利标题: METHOD FOR FORMING FULLY SILICIDED GATES
- 专利标题(中): 形成全硅胶门的方法
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申请号: US11616029申请日: 2006-12-26
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公开(公告)号: US20080153241A1公开(公告)日: 2008-06-26
- 发明人: Chia-Jung Hsu , Chin-Hsiang Lin , Li-Wei Cheng
- 申请人: Chia-Jung Hsu , Chin-Hsiang Lin , Li-Wei Cheng
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/28
摘要:
A method for forming a fully silicided gate is disclosed. A gate structure of a transistor device is provided on a substrate. A mask layer is spin-on coated over the substrate to cover the gate structure and source/drain regions of the transistor device. The mask layer is etched back to expose a silicon layer of the gate structure. The silicon layer of the gate structure is then fully silicided. The mask layer is then removed from the substrate to expose the source/drain regions. The source/drain regions are finally silicided.
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