发明申请
- 专利标题: Semiconductor device having a pseudo power supply wiring
- 专利标题(中): 具有伪电源布线的半导体装置
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申请号: US11878209申请日: 2007-07-23
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公开(公告)号: US20080169840A1公开(公告)日: 2008-07-17
- 发明人: Junichi Hayashi , Hiromasa Noda
- 申请人: Junichi Hayashi , Hiromasa Noda
- 申请人地址: JP Tokyo
- 专利权人: ELPIDA MEMORY, INC.
- 当前专利权人: ELPIDA MEMORY, INC.
- 当前专利权人地址: JP Tokyo
- 优先权: JP2006-209778 20060801
- 主分类号: H03K19/0175
- IPC分类号: H03K19/0175
摘要:
A semiconductor device including an AND-NOR composite gate of which AND unit is supplied with input signals IN and VDD and NOR unit is supplied with an inverted signal EB of an enable signal E, and an AND-NOR composite gate of which AND unit is supplied with an input signal INB and an enable signal E and NOR unit is supplied with VSS. These gates are inserted into a path to which the input signals IN and INB are supplied. Thereby, a symmetric property of a complimentary signal can be retained. Further, outputs of the AND-NOR composite gates are fixed irrespective of a logical level of the enable signal E. Thus, a sub-threshold current also is inhibited.
公开/授权文献
- US07541839B2 Semiconductor device having a pseudo power supply wiring 公开/授权日:2009-06-02
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