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发明申请
US20080203525A1 Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation method thereof 有权
具有垂直层叠电容器层的半导体器件的电容微调电路及其操作方法

Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation method thereof
摘要：
A capacitance trimming circuit of a semiconductor device may include a plurality of capacitor layers and/or a plurality of fuses. The plurality of capacitor layers may be vertically stacked. The plurality of fuses may be arranged to correspond to the plurality of capacitor layers, and/or the plurality of fuses may be configured to select corresponding ones of the plurality of capacitor layers for controlling a capacitance of the plurality of capacitor layers.
摘要（中）：

半导体器件的电容微调电路可以包括多个电容器层和/或多个保险丝。 多个电容器层可以是垂直堆叠的。 多个保险丝可以被布置成对应于多个电容器层，和/或多个保险丝可以被配置为选择多个电容器层中的相应的保险丝来控制多个电容器层的电容。

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