发明申请
US20080222343A1 MULTIPLE ADDRESS SEQUENCE CACHE PRE-FETCHING 失效
多地址序列高速缓存预处理

MULTIPLE ADDRESS SEQUENCE CACHE PRE-FETCHING
摘要:
A method is provided for pre-fetching data into a cache memory. A first cache-line address of each of a number of data requests from at least one processor is stored. A second cache-line address of a next data request from the processor is compared to the first cache-line addresses. If the second cache-line address is adjacent to one of the first cache-line addresses, data associated with a third cache-line address adjacent to the second cache-line address is pre-fetched into the cache memory, if not already present in the cache memory.
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