发明申请
- 专利标题: Multi-chip stack structure and fabrication method thereof
- 专利标题(中): 多芯片堆叠结构及其制造方法
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申请号: US12077003申请日: 2008-03-13
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公开(公告)号: US20080224289A1公开(公告)日: 2008-09-18
- 发明人: Jung-Pin Huang , Chin-Huang Chang , Chien-Ping Huang , Chung-Lun Liu , Cheng-Hsu Hsiao
- 申请人: Jung-Pin Huang , Chin-Huang Chang , Chien-Ping Huang , Chung-Lun Liu , Cheng-Hsu Hsiao
- 申请人地址: TW Taichung
- 专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人地址: TW Taichung
- 优先权: TW096108504 20070313
- 主分类号: H01L23/495
- IPC分类号: H01L23/495 ; H01L21/00
摘要:
A multi-chip stack structure and a fabrication method thereof are proposed, including providing a leadframe having a die base and a plurality of leads and disposing a first and a second chips on the two surfaces of the die base respectively; disposing the leadframe on a heating block having a cavity in a wire bonding process with the second chip received in the cavity of the heating block; performing a first wire bonding process to electrically connect the first chip to the leads through a plurality of first bonding wires, and forming a bump on one side of the leads connected with the first bonding wires; disposing the leadframe in an upside down manner to the heating block via the bump with the first chip and the first bonding wires received in the cavity of the heating block; and performing a second wire bonding process to electrically connect the second chip to the leads through a plurality of second bonding wires. The bump is used for supporting the leads to a certain height so as to keep the bonding wires from contacting the heating block and eliminate the need of using a second heating block in the second wire bonding process of the prior art, thereby saving time and costs in a fabrication process. Also, as positions where the first and second bonding wires are bonded to the leads on opposite sides of the leadframe correspond with each other, the conventional problems of adversely affected electrical performance and electrical mismatch can be prevented.
公开/授权文献
- US07768106B2 Multi-chip stack structure and fabrication method thereof 公开/授权日:2010-08-03
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