发明申请
US20080231356A1 Voltage margining with a low power, high speed, input offset cancelling equalizer
有权
具有低功耗，高速度，输入失调消除均衡器的电压裕度
- 专利标题： Voltage margining with a low power, high speed, input offset cancelling equalizer
- 专利标题（中）： 具有低功耗，高速度，输入失调消除均衡器的电压裕度
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申请号： US11724128申请日： 2007-03-14
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公开(公告)号： US20080231356A1公开(公告)日： 2008-09-25
- 发明人: Bruce Querbach , Randall B. Hamilton , Luke A. Johnson , Minyoung Kim
- 申请人： Bruce Querbach , Randall B. Hamilton , Luke A. Johnson , Minyoung Kim
- 主分类号： H03F1/02
- IPC分类号： H03F1/02
摘要：
A switched-capacitor circuit that may be used for equalization, but configurable for voltage margining. The switched-capacitor circuit cancels the offset voltage inherent in an amplifier and sets the common mode of an input signal at half the rail voltage. Two capacitors level shift an input signal before being applied to the two input ports of an amplifier. When used for voltage margining, the input voltage swing is reduced at the input ports of the amplifier by connecting a digital-to-analog controlled voltage source to the two capacitors.
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