发明申请
US20080232013A1 High-Voltage Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I/O Interface
有权
用于混合电压I / O接口的高耐压功率轨道ESD钳位电路
- 专利标题: High-Voltage Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I/O Interface
- 专利标题(中): 用于混合电压I / O接口的高耐压功率轨道ESD钳位电路
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申请号: US12134061申请日: 2008-06-05
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公开(公告)号: US20080232013A1公开(公告)日: 2008-09-25
- 发明人: Ming-Dou Ker , Wen-Yi Chen , Che-Hao Chuang
- 申请人: Ming-Dou Ker , Wen-Yi Chen , Che-Hao Chuang
- 申请人地址: TW Hsinchu
- 专利权人: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- 当前专利权人: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- 当前专利权人地址: TW Hsinchu
- 主分类号: H02H9/00
- IPC分类号: H02H9/00
摘要:
A circuit for electrostatic discharge (ESD) protection includes a resistor a capacitor connected in series with the resistor, a first transistor including a gate, the gate being connected to a first power supply providing a first voltage to the gate via the resistor and a first terminal connected to the first power supply, a second transistor including a gate, the gate being connected to a second power supply, the second power supply providing a second voltage smaller than the first voltage, the second transistor having a first terminal connected to a second terminal of the first transistor, and a third transistor including a gate, the gate being connected to the second power supply, a first terminal of the third transistor being connected to a second terminal of the second transistor, and a second terminal being connected to a reference voltage different from the first voltage and the second voltage.
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