发明申请
- 专利标题： Structure for Electrostatic Discharge in Embedded Wafer Level Packages
- 专利标题（中）： 嵌入式晶圆级封装中静电放电的结构
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申请号： US11746936申请日： 2007-05-10
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公开(公告)号： US20080265421A1公开(公告)日： 2008-10-30
- 发明人: Markus Brunnbauer , Thorsten Meyer , Stephan Bradl , Ralf Plieninger
- 申请人： Markus Brunnbauer , Thorsten Meyer , Stephan Bradl , Ralf Plieninger
- 申请人地址： DE Neubiberg
- 专利权人： INFINEON TECHNOLOGIES AG
- 当前专利权人： INFINEON TECHNOLOGIES AG
- 当前专利权人地址： DE Neubiberg
- 优先权： DE102007020656.0 20070430
- 主分类号： H01L23/52
- IPC分类号： H01L23/52 ; H01L21/4763 ; H01L23/552
摘要：
A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.