发明申请
- 专利标题： PARALLEL INSTRUCTION PROCESSING AND OPERAND INTEGRITY VERIFICATION
- 专利标题（中）： 并行指令处理和操作完整性验证
-
申请号： US11742029申请日： 2007-04-30
-
公开(公告)号： US20080270824A1公开(公告)日： 2008-10-30
- 发明人: David E. Kroesche , Swamy Punyamurtula
- 申请人： David E. Kroesche , Swamy Punyamurtula
- 申请人地址： US CA Sunnyvale
- 专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： G06F11/16
- IPC分类号： G06F11/16
摘要：
A method includes storing a first data to a first portion of a storage location of a storage component of a processing device in association with a first store operation and obtaining a second data from the storage location, the second data being stored at the storage location prior to the first data. The method further includes determining whether the storage location has a bit error at second portion of the storage location different from the first portion based on the second data obtained from the storage location. The method additionally includes storing a third data to a second portion of the storage location in response to determining the storage location has a bit error at the second portion, wherein the third data is to correct the bit error.