A semiconductor device 10a includes a normal circuit 11 and a voltage fluctuation detection circuit 12a connected to a power supply 100 in common with the normal circuit 11. The voltage fluctuation detection circuit 12a includes an inverting amplifier 13a, a switching element 14, which is connected between input and output terminals of the inverting amplifier 13a, and a capacitance element 15 connected to the input terminal of the inverting amplifier 13a. After the normal circuit 11 and the switching element 14 are set to an operating state and ON state, respectively, when the switching element 14 is set to OFF state at an arbitrary time, charge corresponding to a power supply voltage Vc0 at that time accumulates in the capacitance element 15. After the normal circuit 11 is set to a suspended state, a potential VDD of the power supply 100 is set to an arbitrary value, and the inverting amplifier 13a compares the value of a power supply voltage Vc with the voltage value Vc0 corresponding to the charge held in the capacitance element 15.