Invention Application
US20090017625A1 Methods For Removing Gate Sidewall Spacers In CMOS Semiconductor Fabrication Processes
有权
CMOS半导体制造工艺中去除栅极侧壁间隔物的方法
- Patent Title: Methods For Removing Gate Sidewall Spacers In CMOS Semiconductor Fabrication Processes
- Patent Title (中): CMOS半导体制造工艺中去除栅极侧壁间隔物的方法
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Application No.: US11778038Application Date: 2007-07-14
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Publication No.: US20090017625A1Publication Date: 2009-01-15
- Inventor: Kyoung Woo Lee , Ja Hum Ku , JunJung Kim , Chong Kwang Chang , Min-Chul Sun , Jong Ho Yang , Thomas W. Dyer
- Applicant: Kyoung Woo Lee , Ja Hum Ku , JunJung Kim , Chong Kwang Chang , Min-Chul Sun , Jong Ho Yang , Thomas W. Dyer
- Main IPC: H01L21/311
- IPC: H01L21/311
Abstract:
Semiconductor fabrication processes are provided for removing sidewall spacers from gate structures while mitigating or otherwise preventing defect mechanisms such as damage to metal silicide structures or otherwise impeding or placing limitations on subsequent process flows.
Public/Granted literature
- US07790622B2 Methods for removing gate sidewall spacers in CMOS semiconductor fabrication processes Public/Granted day:2010-09-07
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