发明申请
- 专利标题: SEMICONDUCTOR TESTING CIRCUIT AND SEMICONDUCTOR TESTING METHOD
- 专利标题(中): 半导体测试电路和半导体测试方法
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申请号: US12173860申请日: 2008-07-16
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公开(公告)号: US20090021279A1公开(公告)日: 2009-01-22
- 发明人: Satoshi Kishimoto , Tomohiko Kanemitsu
- 申请人: Satoshi Kishimoto , Tomohiko Kanemitsu
- 申请人地址: JP Osaka
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JP Osaka
- 优先权: JP2007-186384 20070718
- 主分类号: G01R31/26
- IPC分类号: G01R31/26
摘要:
A semiconductor testing circuit of the present invention includes a signal line which is connected to a terminal not to be tested and a plurality of terminals to be tested of a semiconductor device; switch circuits for controlling electrical connection/disconnection between the signal line and the terminals to be tested; and a resistor connected to one end of the signal line. With this configuration, in a test on the AC characteristics of an input signal, a test signal generated by an LSI tester can be inputted to the terminals to be tested through the terminal not to be tested and the signal line by turning on the switch circuits.
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