发明申请
- 专利标题: SOLDER BUMP ON A SEMICONDUCTOR SUBSTRATE
- 专利标题(中): 半导体基板上的焊点
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申请号: US12244699申请日: 2008-10-02
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公开(公告)号: US20090032945A1公开(公告)日: 2009-02-05
- 发明人: Shin-Puu JENG , Hao-Yi TSAI , Shang-Yun HOU , Hsien-Wei CHEN , Chia-Lun TSAI
- 申请人: Shin-Puu JENG , Hao-Yi TSAI , Shang-Yun HOU , Hsien-Wei CHEN , Chia-Lun TSAI
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
A solder bump on a semiconductor substrate is provided. The solder bump has a semiconductor substrate with a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein the inorganic passivation layer has a thinner portion adjacent a top portion of the first opening. The solder bump further has a soft passivation layer on the inorganic passivation layer with a second opening larger than the first opening, an under bump metal layer conformally formed along the first opening and the second opening and a solder bump formed on the under bump metal layer.
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