发明申请
- 专利标题: DATA PROCESSOR
- 专利标题(中): 数据处理器
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申请号: US12135189申请日: 2008-06-08
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公开(公告)号: US20090049325A1公开(公告)日: 2009-02-19
- 发明人: TAKANOBU NARUSE , Hirokatsu Noguchi , Kazuhide Kawade , Yoshiyuki Matsumoto
- 申请人: TAKANOBU NARUSE , Hirokatsu Noguchi , Kazuhide Kawade , Yoshiyuki Matsumoto
- 专利权人: RENESAS TECHNOLOGY CORP.
- 当前专利权人: RENESAS TECHNOLOGY CORP.
- 优先权: JP2004-158822 20040528
- 主分类号: G06F1/04
- IPC分类号: G06F1/04
摘要:
It is aimed at providing a data processor capable of suppressing a sudden current change from the viewpoint of a synchronization clock. A data processor 1 comprises a clock pulse generation circuit and a circuit module operating on input clock signal CLKi output from the clock pulse generation circuit. In case of restoration from a power-on reset period or a standby state, the clock pulse generation circuit stepwise changes frequencies of the clock signal from low to high frequencies. This makes it possible to prevent a power supply current from suddenly increasing in case of restoration from the power-on reset period or the standby state.