发明申请
- 专利标题： Through-Chip Via Interconnects for Stacked Integrated Circuit Structures
- 专利标题（中）： 用于堆叠集成电路结构的片上通过互连
-
申请号： US11847239申请日： 2007-08-29
-
公开(公告)号： US20090057872A1公开(公告)日： 2009-03-05
- 发明人: Eric R. Ehlers , Jim Clatterbaugh , Mathias Bonse , Timothy E. Shirley , Jerry R. Orr
- 申请人： Eric R. Ehlers , Jim Clatterbaugh , Mathias Bonse , Timothy E. Shirley , Jerry R. Orr
- 主分类号： H01L23/52
- IPC分类号： H01L23/52 ; H01L21/00 ; H01L23/04
摘要：
A stacked IC structure has an integrated circuit (IC) having a front IC side, a back IC side, and a first conductive feature formed on the front IC side. A through-chip via connects to the first conductive feature on the front IC side. A substrate has an external circuit formed on a front surface. The IC attaches to the front surface of the substrate and the through-chip via forms a connection between the first conductive feature and the external circuit.
公开/授权文献
信息查询
IPC分类:
