发明申请
- 专利标题: SIMULATION METHOD AND SIMULATION APPARATUS FOR LDMOSFET
- 专利标题(中): LDMOSFET的仿真方法和仿真设备
-
申请号: US12130320申请日: 2008-05-30
-
公开(公告)号: US20090070084A1公开(公告)日: 2009-03-12
- 发明人: Mitiko Miura , Masahiro Yokomichi , Takahiro Kajiwara , Norio Sadachika , Masataka Miyake , Takahiro Iizuka , Masahiko Taguchi , Tatsuya Ohguro
- 申请人: Mitiko Miura , Masahiro Yokomichi , Takahiro Kajiwara , Norio Sadachika , Masataka Miyake , Takahiro Iizuka , Masahiko Taguchi , Tatsuya Ohguro
- 优先权: JP2007-237184 20070912
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.
公开/授权文献
- US07983889B2 Simulation method and simulation apparatus for LDMOSFET 公开/授权日:2011-07-19
信息查询