发明申请
US20090081873A1 Methods of Patterning Insulating Layers Using Etching Techniques that Compensate for Etch Rate Variations
有权
使用补偿蚀刻速率变化的蚀刻技术对绝缘层进行图案化的方法
- 专利标题: Methods of Patterning Insulating Layers Using Etching Techniques that Compensate for Etch Rate Variations
- 专利标题(中): 使用补偿蚀刻速率变化的蚀刻技术对绝缘层进行图案化的方法
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申请号: US11861478申请日: 2007-09-26
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公开(公告)号: US20090081873A1公开(公告)日: 2009-03-26
- 发明人: Wan-jae Park , Kaushik Arun Kumar , Joseph Edward Linville , Anthony David Lisi , Ravi Prakash Srivastava , Hermann Willhelm Wendt
- 申请人: Wan-jae Park , Kaushik Arun Kumar , Joseph Edward Linville , Anthony David Lisi , Ravi Prakash Srivastava , Hermann Willhelm Wendt
- 专利权人: Samsung Electronics Co., Ltd.,International Business Machines Corporation,Advanced Micro Devices Corporation,Chartered Semiconductor Manufacturing Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.,International Business Machines Corporation,Advanced Micro Devices Corporation,Chartered Semiconductor Manufacturing Ltd.
- 主分类号: H01L21/311
- IPC分类号: H01L21/311
摘要:
Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically insulating layer. First and second portions of the electrically insulating layer extending opposite the first and second openings, respectively, are simultaneously etched at first and second different etch rates. This etching yields a first trench extending adjacent the first opening that is deeper than a second trench extending adjacent the second opening. Then, the bottoms of the first and second trenches are simultaneously etched to substantially the same depths using an etching process that compensates for the first and second different etch rates.
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