A chip package structure and a method of manufacturing the same are provided. The chip package structure includes a package portion and a plurality of external conductors. The package portion includes a distribution layer, a chip, a plurality internal conductors and a sealant. The distribution layer has a first surface and a second surface, and the chip is disposed on the first surface. Each internal conductor has a first terminal and a second terminal. The first terminal is disposed on the first surface. The sealant is disposed on the first surface for covering the chip and partly encapsulating the internal conductors, so that the first terminal and the second terminal of each internal conductor are exposed from the sealant. The external conductors disposed on the second surface of the distribution layer of the package portion are electrically connected to the internal conductors.