In one embodiment, a sense amplifier for sensing a binary state of a memory cell coupled to a bit line and a complementary bit line and for writing a binary state into the memory cell is provided. The sense amplifier includes: a first pair of switches including a first switch coupled to a node on the bit line and a second switch coupled to a node on the complementary bit line; a signal detector having a first input terminal coupled to the first switch and a second input terminal coupled to the second switch, the signal detector configured to sense voltages on the bit line and the complementary bit line through the first pair of switches during a read operation; a second pair of switches, wherein a first switch in the second pair couples between the node on the bit line and ground and is responsive to a data signal to be written to the memory cell and a second switch couples between the node on the complementary bit line and ground and is responsive to a complementary data signal to be written to the memory cell, wherein if either the data signal or the complementary data signal is true, a corresponding bit line is grounded so as to force the binary state of memory cell into an appropriate value during a write operation; and wherein the first pair of switches are controlled such that they turn on during a read operation while the signal detector determines the binary state of the memory cell, the first pair of switches being off during the write operation whereby a capacitance presented to the bit line and the complementary bit line by the sense amplifier is lower during the write operation than during the read operation.