发明申请
US20090127629A1 Method of forming npn and pnp bipolar transistors in a CMOS process flow that allows the collectors of the bipolar transistors to be biased differently than the substrate material
审中-公开
在CMOS工艺流程中形成npn和pnp双极晶体管的方法,其允许双极晶体管的集电极不同于衬底材料的偏置
- 专利标题: Method of forming npn and pnp bipolar transistors in a CMOS process flow that allows the collectors of the bipolar transistors to be biased differently than the substrate material
- 专利标题(中): 在CMOS工艺流程中形成npn和pnp双极晶体管的方法,其允许双极晶体管的集电极不同于衬底材料的偏置
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申请号: US11985428申请日: 2007-11-15
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公开(公告)号: US20090127629A1公开(公告)日: 2009-05-21
- 发明人: Zia Alan Shafi
- 申请人: Zia Alan Shafi
- 主分类号: H01L21/8248
- IPC分类号: H01L21/8248 ; H01L27/10
摘要:
NPN and PNP bipolar junction transistors are formed in a semiconductor substrate material in a double polysilicon CMOS process flow in a manner that allows the collectors of both of the npn and pnp bipolar transistors to be biased differently than the bias that is placed on the semiconductor substrate material.